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Research And Design Of High PSR, Low Power, On-chip LDO

Posted on:2015-05-01Degree:MasterType:Thesis
Country:ChinaCandidate:Y Z JinFull Text:PDF
GTID:2272330452464620Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
Low dropout regulator (LDO) is a kind of power management unitwhich is widely used in mobile portable electronic devices. And on-chipLDO also becomes an irreplaceable power management module in today’smixed-signal circuits. As LDO has the characteristic of simple structure,low cost, low power consumption and low noise, so it is more and moreused in the portable mixed-signal circuits and draw more and moreattention from designers.In this paper, an on-chip LDO used for power supply is designed forembedded flash chip. Its standby current is quite low, so the powerconsumption is very low as well. And the designed LDO has a high powersupply rejection (PSR). It can supply the needed voltage with little noise asthe noise from the input is rejected. It can be used not only in theembedded flash chip but also in some other noise-sensitive circuits likeDRAMs, PLLs and EPROMs.The designed LDO is based on TSMC0.18um CMOS process modellibrary and simulated using Hspice. The result shows it has a high PSRwhich is improved by about20dB. At different loading cases, the worstPSR can also reach-20dB at high frequency and-45dB at DC, rejectingthe input noise effectively.
Keywords/Search Tags:Low dropout (LDO), Power supply rejection (PSR), Low power, On-chip, Embedded flash
PDF Full Text Request
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