Research Of Three-phase PWM Inverter Control Based On FPGA

Continuous development of modern society, people on the performance of high performance inverter research and development all the more attention, a lot of people in the past unscientific abuse of electronic products, resulting in a harmonic pollution has become extremely serious, all-digital the controller has become the focus of people’s eyes, and gradually replace the original analog control highly anticipated era. Inverter technology constantly updated, one of their requirements more stringent and demanding, in the course of alternating current into direct current, the three-phase constant voltage constant frequency inverter well completion requirements, has been widely used in the relevant field which, in this design, we use relatively mature phase voltage source inverter. We gradually the various modules of the system conducted a preliminary understanding of both science optimize the role of the various parts of the division, or the entire total module hardware design selection, as well as operating the pipeline back up. In order to control the inverter to improve the accuracy of the waveform, the design uses FPGA chip to realize the multi-resonance digital controller. The chip can not only control all aspects can also achieve a certain degree of modulation, the inverter controller on the FPGA to substantially control methods and the presentation and understanding of the module, select what type of device specifications and technical programs, and in the whole substantially during the chip design process will be described. In looking at the data in the controller of the phase locked loop and a certain understanding of the relevant knowledge, and then studied to see how to design more reasonable, for some modules of simulation performed to complete the number of sub-lock technology in inverter technology. During the lock-in process, we need to ensure that the output voltage of the inverter circuit and the synchronization signal must have kept step. We understand that the use of a scheme of EDA tools, is to be operated by means of the use of all-digital method, by means of the counter and the means to use look-up table, we will learn the relevant algorithm designed in accordance with the digital sinusoidal signal. Flat rate and amplitude modulated sinusoidal signal obtained, coupled with its good characteristics of HDL language of the FPGA-based digital signal generator design. Compared to other methods, this method has a strong practical significance.