Built-in Self-test March Optimization Algorithm

Nowadays, with the maturity of the ultra-large-scale VLSI circuits and the relate d very-deep-submicron technology (VDSM), problems have also been obvious since t he yield of the memory cannot meet people’s demands. At present, the test of chips h as become the bottleneck of the development of chips. Due to the improvement of se miconductor technology as well as the cost increase in testing, ATE test has been una ble to meet the conventional testing demand, thus probing into the built-in self test (BI ST) has become a must.The proliferation of large, high capacity embedded memory on system-on-a-chip microelectronic applications has created the need for built-in self-test(BIST) method. Embedded memories are relatively inaccessibile through a chip’s pins, make internal testingeffective.Embedded memories, like stand-alone memories,suffer from random physical defects created during fabrication. Such defects are expentive because they decrease the manufacturing yield. Because of this, we research the fault model, algorithm and structure, which are the key to those questions.This thesis inainly aims at researching the current BIST and related algorithm optimization.It first introduces the development of current testing technology, and then discusses the static random access memory SRAM and fault types in detail. Then follows the introduction of MBIST workflow. Finally, it expounds the March algorithm and varieties. What’s more, It analyses the causes of and solutions to the relevant fault model. Based on the current commonly used algorithms on March C-, this thesis puts forwards the new algorithm March C-D. This new algorithm has a better coverage of the pseudo-reading failure which March C-can not cover.It then analysesthe main process of the fault testing work of March C-D, obtaining a theoretical validation. Finally, on basis of on the ModelSim simulation platform, I can verify the correctness and feasibility of March C-D algorithm proposed by myself. This improved algorithm has high coverage, reduces the repetition rate when MarchC algorithm detects fault,and has a significant effect of further improving the yield of chips detection.