Research And Implementation Of Navigation Computer Board Automatic Test System | | Posted on:2017-11-13 | Degree:Master | Type:Thesis | | Country:China | Candidate:B He | Full Text:PDF | | GTID:2322330503495869 | Subject:Engineering | | Abstract/Summary: | PDF Full Text Request | | Embedded navigation computer is the core component of the strapdown inertial navigation system, which is responsible for navigation data solution and outputting navigation result. In order to meet the requirements of high reliability in the process of production and daily use, it is required to test the navigation computer hardware frequently. Therefore, automatic test system based on Failure Mode and Effects Analysis is researched in this thesis. The test system of the navigation computer with the function of intelligent fault diagnosis is proposed after analyzing the test requirements and the system FMEA. The software testing process is designed and the testability of the test system is verified.The failure mode and effect of embedded navigation computer is analyzed from three levels: component level, functional circuit level and board level. Functional module is divided into functional circuit by using functional analysis method. The performance of the functional module is described in detail by researching common failure causes of functional circuits in practical use. By studying the fault reason and fault effect of the functional circuit, device failure mode and board fault reason is obtained. The fault tree module between the fault event is established, which is based on the analysis of all levels of fault events in the system FMEA table.The implementation scheme of the navigation computer test system is designed in this thesis. The hardware platform and the corresponding performance index are described. The test software of the upper computer is divided into four stages: the test preparation stage, the data communication interface function test, the board level fault detection and navigation performance monitoring. Software test logic is designed based on the testing content of each phase. According to the system fault information obtained from the test phase, the fault tree model of the navigation computer is built and used as the basis for the fault diagnosis of the test system.The testability and fault diagnosis function of the testing system is verified by fault injection which is designed to simulate the common failure mode of system. The computational performance of the navigation computer is tested by the static and dynamic experiments on the test system. Test results show that the system meets the test requirements. | | Keywords/Search Tags: | Navigation computer, test system, FMEA, FTA, serial port design, ARINC429 port design | PDF Full Text Request | Related items |
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