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The CMOS Digital Controller For Switch Mode DC-DC Converter

Posted on:2017-12-26Degree:MasterType:Thesis
Country:ChinaCandidate:S N XieFull Text:PDF
GTID:2322330503495900Subject:Engineering
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Switch mode power supply(SMPS) with the advantages of small volume, light weight, high efficiency, low calorific value, stable performance etc., has been widely used in electronic equipment. Conventionally, SMPS has analog control loop, while digital circuit has advantages of good stability, good flexibility and easiness to migrate to different processing technologies. With the fast evolvement of semiconductor processing technology, the ability of digital signal processing of integrated circuit is ever increasingly enhanced. Therefore, the digitization of SMPS has become a hot research area in recent years.This thesis designed the digital control circuit for the DC-DC Buck Switching Converter. The digital controller featuring the voltage mode control method, is composed of a time domain ADC, which transforms the output of the voltage divider into digital signal; a digital filter, working as the error amplifier and compensator in the analog control method, to compensation for the open loop transfer function; a second-order ?-? DPWM, to lower the resolution as well as the frequency and power dissipation of the core DPWM; The system also includes a charge-pump phase-lock-loop(CPPLL), to synchronize the external clock frequency, or to generate the local clock when working in the open loop.System design was first conducted in MATLAB Simulink to determine the module specifications. Then, based on the CSMC 0.5um CMOS technology, analog part circuitries of the CPPLL and the ADC were designed in the transistor level using Cadence. Also, the digital modules including the digital filter, the second-order ?-? DPWM were designed in RTL level, and then the code were synthesized with Design Compiler, and finally layout was generated with backend layout tools. System level functional verification and performance characterization were first conducted using the mixed signal simulation tool in Cadence. Then the system performances were verified by an actual testing platform was built employing FPGA and several external components. In this work, under 2.6V to 4.2V supply voltage and 4? rated load, the designed digitally control DC-DC Buck Converter achieved less than 1% ripple voltage, average efficiency above 90%.
Keywords/Search Tags:Digital control, Time domain ADC, Charge pump phase locked loop, ?-? DPWM
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