Design And Implementation Of Universal Platform Based On WTB&ETB

With the development of train communication network in more than 20 years,more and more companies and units have been engaged in the research of TCN related products.The TCN network has been used widely throughout the world.On the urban rail trains and high speed emu,the train communication network technology has become one of the main technology of modern railway vehicles.Because TCN network inevitably exists some deficiency,it can't meet the all performance requirements in certain circumstances.In this case,some other forms of bus can be added as a supplement to cover the shortage of TCN in some occasions.This paper bases on the train reconnection communication technology research and development project.This paper introduces the general platform design which is based on the WTB protocol and ETB protocol.FPGA external interface circuit can support two kinds of bus communication protocol with its hardware.It can realize the organization of the main network nodes,address assignment and it can ensure the data transmission integrity and instantaneity.After deep understanding of the stranded of IEC61375-1 Wire Train Bus and the Ethernet Train Backbone of IEC61375-2-5,the FPGA programming was developed with the Quartus II development platform on the basis of circuit design by Altium Designer.This paper first introduces the characteristics and development of TCN.According to the requirements of the function of the system,this paper uses FPGA,HPS and common CPU to implement the scheme of communication system.Train reconnection hardware platform design is analyzed in this paper,including the hardware circuit design and the main chips.The FPGA module,unit of data transmission and communication memory sharing,sending and receiving are varified.This paper introduces the hardware platform,and the interface circuit design which includes the power circuit,DDR3 SDRAM circuit,WTB bus interface circuit and allows ETB bus interface circuit and so on.This paper also expounds the process from the master node to node addressing.In the polling process,each node is in the Inauguration and regular operation state transitions,and each state node needs to realize the function.Through the union debugging test,the hardware platform and the communication system work pretty well.Every function module can meet the design demand.