Research On Off-chip Capacitor-less LDO And Optimum Design Of Frequency Compensation

In the integrated circuit chip,the power management module,as the power supply of other functional modules,undertakes the functions of power transformation,distribution,detection and stability.The power management module mainly includes low dropout linear regulator(LDO),switching power supply(DC-DC),charge pump,and driver.Among these main types,LDO has the advantages of low noise,low power consumption,high power ripple rejection ratio,good linear adjustment rate,fast load transient response,and easy design and integration with other modules in the chip.LDO is mainly integrated in analog and RF chips as the power supply of internal modules.The main performance indexes of LDO design are: low voltage difference of output power transistor,load capacity of high output current,low static current at no-load,high noise suppression ability of power supply,fast transient response of load and small overshoot of output voltage.Because there are many poles in LDO loop,and the distribution of poles varies with the load,the loop stability of LDO is the most important aspect.In the traditional LDO design,in order to stabilize the loop,a large load capacitor is connected to the output end to reduce the frequency of the main pole.Therefore,the distance from the secondary pole is widened to increase the phase margin and stabilize the loop.But this not only sacrifices the bandwidth,but also makes the chip difficult to integrate due to the large load capacitance.Another way of compensation is to generate the appropriate left half plane zero point through the equivalent series resistance of the off-chip load capacitor,and then cancel the secondary pole to stabilize the loop.However,the value of equivalent series resistance is difficult to be accurate to produce the zero point which is just cancelled with the secondary pole,and the secondary pole will also change with the load.Therefore,it is difficult to achieve high performance and on-chip integration for traditional capacitor compensated LDO.In view of the above problems of off-chip capacitor compensated LDO,the property for off-chip capacitor-less has become the basic requirement of LDO design.The method for improving the stability of LDO without external capacitors is presented.Based on the theoretical analysis,the LDO circuit with dynamic pole tracking frequency compensation technology with additional buffer is designed.The circuit is designed with SOI 65 nanometer technology.The input voltage can be changed in the range of 2V ? 3V,and the output voltage of LDO is stable at 1.8V.By means of dynamic compensation,the secondary poles of LDO loop will follow the change of load,which not only improves the stability of the system loop and improves the transient response characteristics,but also enables the LDO to have a wide range of 0.1m A ? 50 m A.In this paper,some typical frequency compensation methods are analyzed,and the designed LDO circuit and simulation results as well as the tape layout are given.