| As a part of DVD drive manager SOC (System On Chip) , DVD servo control microprocessor architecture was designed to perform routine, periodic servo tasks, such as focus, spindle, track seeking and track following.To archive high performance, DVD servo control microprocessor uses RISC like instruction set. Harvard architecture has been used for the servo control microprocessor, having four program and data buses. In order to support addition, subtraction, multiplication, branch and movement instruction, corresponding control logic and execute unit were designed..There are three distinct and memory spaces with associated buses and 20bits internal data bus and operation unit. In light of the algorithms for which the SCP is intended, this particular organization is a natural choice. Two of the memories, the SVRAM (State Variable RAM) and the KRAM (Coefficient RAM), store program variables and constants. A third memory, the IRAM (Instruction RAM), provides program storage.Design of servo control microprocessor strictly follows the design flow of deep submicron digital IC. Servo control microprocessor introduces low power design technology in RTL level, so it has good power saving feature, only consuming 0.2 mW/MHz. Instructions execute unit processes data not only at positive edge of clock, but also at negative edge of clock, so instruction pipeline was shortened to two levels. This reduces design complexity of instruction pipeline control logic, avoid dealing with pipeline hazards when designing compiler.Design of DVD servo control microprocessor was validated and can meet system performance. Most of instructions can finish in a clock cycle. Using TSMC . 18um COMS process, DVD servo control microprocessor can run at 100 MHz frequencies. |