Research Of IC Verification Platform Base On Verification Methodology

With the rapid development of semiconductor technology,the scale of IC design is increasing and the structure is becoming more complex.The scale up to multi-million gates, the clock frequency up to gigahertz integrated circuits are no longer rare.In order to ensure the reliability of chip operation, taping security, maintain a reasonable labor costs,new verification is emerging.At present a number of EDA companies abroad,have introduced their general ASIC Verification Platform based on verification methodology. The two companies Synopsys and ARM have jointly developed VMM,and Cadence and Mentor have jointly developed OVM. They all build their own verification environment and launched their own verification methodology.However, the subject in our country was basically at the blank stage.Most of the IC design companies in our country are testing and verifing base on scripting language and manul stimulating.This kind of verification is time-consuming,laborious, very seriously wasting of human resources.Moreover, The too long development cycle leds to the chip produced in our county has no competitiveness without any competitive in international arena.To meet Increasingly complex verification requirements, This article analysised the mainstream verification methodology and experience,constructed the general IC verification platform base on verification methodology combining the verification methodology which had been released.The article achieved the following purpose (1) shorting the development cycle of testbench; (2) enhancing the completeness of chip verification; (3) Speeding up the verification speed; (4) saving the cost of verification.This first chapter introduces the latest overview of ic designing at home and abroad and analysises the latest needs of constructing general IC verification platform.The second chapter analysises latest developments verification methodology at home and abroad,And discusses the way to raise the efficiency of verification in verification methodology.The third chapter Points out the basic ideas how to constructing general IC verification platform by analysising the principle of verification methodology.The fourth chapter constructes a simple FIFO test verification platform according to the hierarchical structure in verification methodology,and tests the feasibility of it.The fifth chapter gets the conclusion of advantages of verification platform base on verification methodology through the analysis of verification platform built in the previous chapter.At last the article summed up the future development of verification methodology.